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▶ Overview

VeriTiger®-V13P is a pretty agile and easy bring-up prototyping system from HyperSilicon, using Xilinx Virtex UltraScale+ XCVU13P FPGA. VeriTiger®-V13P delivers high performance, fast running speed and flexible scalability to accelerate software development, system verification and validation. Through the Protowizard® software to manage prototyping runtime resource and Semu® software to deliver highest debug productivity, VeriTiger®-V13P can significantly reduce the digital IC development time..

▶ Key Features

Pretty agile, Easily bring up

VeriTiger®-V13P is a lightweight desktop prototyping platform, based on single XCVU13P FPGA. Only 3kg makes it is so easy to place or move VeriTiger®-V13P.

High speed compile and run, Cost-effective

hsSynth, the high speed parallel compile solution, which speeds up the synthesis process multiple times is supported and VeriTiger®-V13P runs up to 100MHz for advanced design prototyping.

Rich Connectivity and 100+ Daughter Cards

Rich Connectivity is built in VeriTiger-V13P for 100+ ready daughter cards provided by HyperSilicon®. Flexible interfaces deliver high flexibility for clocking, debug and host interface, hsDman, the daughter card management software researched and developmented by HyperSilicon®, can effectively monitor and manage abundant daughter cards.

▶ Specification

• FPGA Devices : Xilinx Virtex UltraScale+ XCVU13P FPGA (XCVU13P-2FHGB2104I x 1)
• 22.8 Million Equivalent ASIC Gates
• 3780K System Logic Cells
• FPGA Memory 454.5Mb(Block RAM 94.5Mb+Ultra RAM 360Mb)
• 12288 DSP Slices


• Connector Resources : 616 High-performance I/Os in total in HSPI2 Connectors
• 8 HSPI2-MGT Connectors, Offering 64 Lanes GTY Channel
• 2 QSFP Interfaces, Offering 8 Lanes GTY Channel
• 6 HSPI2-DQS Connectors
• 3 HSPI2-CAC Connectors, Supporting 3 DDR3/DDR4
• 2 HSPI2-LVDS Connectors, Offering 47 LVDS Differential Pairs
• 1 HSPI2-SEND Connector
• 4 Independent Buttons, 2 Four-digit DIP Switch, 8 User-defined LED Lights


• Clock Resources :
• 4 Programmable Differential Clocks
• 2 Clocks at 20MHz
• 2 SI5338 MMCX Differential Clock Inputs
• 1 SI5338 MMCX Differential Clock Output
• Direct Connect-to FPGA Differential Clocks Offered By 2 Pairs of MMCX
• 3 Transceiver Refclks at 100MHz
• 1 Multi-FPGA Shared and Global Programmable Differential ZCLK Clocks


• Platform Parameters
• Dimensions: L223mm, W340mm, H91mm
• Weight: 3.0 Kg
• Max Power Consumption: 120W

▶ Datasheet

VeriTiger-V13P

▶ Strong softwares

• ProtoWizard®
ProtoWizard® is the runtime software researched and developed by HyperSilicon® to manage prototyping resource. ProtoWizard® delivers high performance in environment construction, resource management, security monitoring, system configuration, etc. in the process of FPGA prototyping. It helps users establish the prototyping environment efficiently and reduces bring-up time.

Highlights
• Multi-Design And Multi-User
• Multi-Veritigers Management
• Turn Off Anytime And Anywhere
• Online Firmware Update
• Hardware Self-Test


• HsDman
HsDman is the daughter card management software researched and developmented by HyperSilicon® for our ready daughercards provided to users. HsDman monitors and manages the present 100+ daughter cards effectively and assists verification team to save prototype development costs and resources.

Highlights
• Pin Mapping
• Daughter Card Library
• Mother Board Library
• Transfer Card Library


• hsSynth
hsSynth® innovates a new way to segment the large-scale design into specified amount modules, and then parallel compile these modules to achieve multifold speed-up of the synthesis process. Only the modified sub-modules will be re-synthesized when the design iterated, which greatly shortens the iterative synthesis process. For multiple iterations in the design, hsSynth only needs to re-synthesize the sub-modules of the iterations, which greatly accelerates the iterative synthesis process.
At the same time, hsSynth provides a "top-down" synthesis mode for FPGA prototype verification to obtain the highest running speed and maximum utilization efficiency of FPGA. Provides a "Bottom-up" synthesis mode for emulation to achieve the maximum consistency with RTL code and maximum debug visibility.

Highlights
• Top-down
• Bottom-up
• Incremental Compilation
• Multifold Speed-up


• hsTrace
Compared with FPGA integrated logic analyzer which delivery a poor sampling depth and transmission speed due to the waveform data occupies FPGA RAM, hsTrace deep debug tool includes many advanced features, including the sampled data is stored in an 8GB external DDR，the waveform data is transfered through ethernet to PC rapidly and provide up to 1G data dump depth.

Highlights
• External RAM
• Transfer by Ethernet
• UP to 1G Dump Depth

▶ I/O Architecture

▶ What's Included

• ATX Power Adaptor: Huntkey Power HYPER 550B
• Ethernet Cable 3m: Gigabit Network Cable
• HSPI2-037-GPLP-C12: GPIO Loopback Test Card
• HSPI2-044-GPIO-B12: HSPI2 to GPIO Card
• HYDT-036-RIS3-A11: Riser3 Lift Protection Card
• HYDT-042-MGLP-D11: MGT Loopback Test Card